This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an adjacent field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures of the EDA flow will benefit from this book. This title covers complete spectrum of the EDA flow, from ESL design modeling to logic/test synthesis, verification, physical design, and test - which helps EDA newcomers to get up-and-running quickly. It includes comprehensive coverage of EDA concepts, principles, data structures, algorithms, and architectures - which helps all readers improve their VLSI design competence. It contains latest advancements not yet available in other books, including Test compression, ESL design modeling, large-scale floorplanning, placement, routing, synthesis of clock and power/ground networks - which helps readers to design/develop testable chips or products.
It also includes industry best-practices wherever appropriate in most chapters - which helps readers avoid costly mistakes.